International Journal of Innovations in Engineering and Technology

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Special Issue – ETiCE 16-2016

1.

High Speed Reliable Multiplier Design with Adaptive Hold Logic

A.Rishita, K.Penchalaiah, T.Pratap

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2.

Design of Delay Efficient Hybrid Variable Latency Carry Skip Adder

C.V.P.Supradeepthi, T.Pratap, K.Penchalaiah

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3.

A Novel Architecture of SRAM-Cell Based Input Vector Monitoring Concurrent BIST Architecture

Ch.Junti, G.Jalalu, K.Murali

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4.

Design and Analysis of Shift Register using Pulsed Latches with Reduced Power and Area

Ch.Jyothsna, M.Swarna Lakshmi, M.Muralidhar

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5.

Implementation of Reverse Converter Design by Using Reversible Logic Gates in Hybrid Parallel Prefix Adders

M. V. K. Karthik, Dr. K. S. Sagar Reddy

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6.

Design of 16/17 Dual Modulus Pre-Scaler by Using TSPC D-Flip-flop and GDI Technique

N. Ramana Gopal, P. Sravan Kumar Reddy

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7.

Correct and Approximate Algorithms for the channel outline Optimization issue

Praveen kumar. P, Sindhuri .P, Syed Athika Sultana

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8.

A Novel Design and Implementation of Reversible Adder cum Subtractor

M.Sarada, M. Muralidhar

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9.

A Novel Architecture of Multiple Constant Multiplication for Efficient FIR Filter Implementation by Using Bit Level Optimization of Adder Trees

Ume Salma S., Syed Athika Sultana, SK Sabiha Begum

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10.

Design of Ultra Low Power TMDS Encoder using QCA (Quantum Cellular Automata) for Nanoscale Communications

Skandha Deepsita S., Muralidhar M., Bharath Varma N.

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11.

Design of Efficient Han-Carlson-Adder

S. Sri Katyayani, Dr.M.Chandramohan Reddy, Murali.K

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12.

Testing and Power Optimization with Programmable PRPG Technique

T. Vinod Kumar, SK. Sabiha Begum, P. Sindhuri

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13.

Design of 8-bit Wallace Tree Multiplierusing Approximate Compressor

T.Swathi, J.Sunil Kumar, Dr. K.S Sagar Reddy

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14.

Design of High Speed Area Efficient IEEE754 Floating Point Multiplier

Mownika V., Girish Gandhi S., Leela Mohan C.

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15.

Design of Delay Efficient PASTA by Using Repetition Process

V.Sai Jaswana, K. Murali

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16.

Performance Evaluation of Parallel Multipliers for High Speed MAC Design

Thirumala Rao V., Girish Gandhi S., Leela Mohan C.

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17.

Physical Network Coding for OFDM in Two-Way Receiving Communications

G.Surendra, D.Sreelakshmi

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18.

Performance and Analysis of PEGASIS Protocol for High Speed Networks

H.K.Guna sekhar, K.Murali, P.Sravan Reddy

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19.

A Joint RDH and Lossless Secure Image and Text Transmission using Public key Cryptosystems

M.Jhansi Rani, Sk.Shaguftha, K.Murali

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20.

Dynamically Assigned Channel for Wireless Sensor Network: A Regret Matching Based Approach

P. Sukumar, M. Praveen Kumar

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21.

Splicing Forgery Detection JPEG Compression through Quantization Noise Analysis

Pasala.Swathi, C .Leela Mohan, S. Girish Gandhi

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22.

Suppression of Synchronization Errors in OFDM Based Carrier Aggregation Systems

P.Harith Kumar, G.Sindhura Bhargavi

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23.

ColorĀ­ Opponent Mechanism For Boundary Detection

S.Amulya, C. Leela Mohan, S. Girish Gandhi

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24.

Index Color Image Retrieval Using Error Diffusion Block Truncation Coding Features

S.Sai Sushma, D.Sreelakshmi

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25.

Video Deinterlacing by Graphic based Visual Saliency

Vayugundla Preethi, Dr. K.S Sagar Reddy, J.Sunil Kumar

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26.

Privacy Information Protection of Video Streams based on Codeword Substitution

Yeluru Rajitha, M. Praveen Kumar

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27.

Image Encryption and Compression Using Some Auxiliary Information

R. Ramesh, J.Sunil Kumar

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28.

Coronary Artery Disease Identification Using Acoustic Features Based on QDA

M.Nagendra Babu, Ch.Padmavathi, Y.Neeraja

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29.

Extremely Low-light Video Denoising and Enhancement with Tone mapping and Filters

P.Manju, SK.MD.Hussain Basha, Y.Neeraja

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30.

Interference Reduction using DCI in Multiuser MIMO Channels

K.Susmitha, B.Malakonda Reddy, Y.Neeraja

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31.

Heart Rate Monitoring Using NI MyDAQ

G.Jalalu, K. Murali

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